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Functional Description
This voltage input
allows the conversion of an analog voltage into a digital value. The internal
analog-to-digital converter has an input limit of 2.6VDC, but the input pins
can accommodate a voltage up to the Vdd for the PSoC. By specifying the desired upper limit of the voltage
range, a voltage input greater than 2.6VDC and less than Vdd
can be accommodated.
Hardware
Interface: A PSoC input pin is connected to a high impedance analog
input connection to the Analog to Digital Converter (ADC), through a
programmable gain block.
Software
Interface: The input voltage
level is presented as a 16-bit signed integer, stored most significant byte
first, in whole number format to 1mV resolution (example: 2.123VDC stored as
2123).
Driver Properties
User-Configurable properties.
· Signal Filtering: First order IIR digital filter: Disable, Enable.
Default setting is Disable.
· Upper Limit: Upper voltage limit at the input pin (in millivolts): 2600, 2773, 2971,
3200, 3467, 3782, 4160, 4622, 5000. Default setting is 2600 mV.
Non-Configurable properties.
· Reference:
Driver Specifications
· Input Range: Limited by property "Upper Voltage Limit"
· Resolution: 1mVDC
