input analog attenuator

Selectable Voltage Range

 

Functional Description

Driver Properties

Driver Specifications

Interface Schematic

 

Functional Description

This voltage input allows the conversion of an analog voltage into a digital value. The internal analog-to-digital converter has an input limit of 2.6VDC, but the input pins can accommodate a voltage up to the Vdd for the PSoC. By specifying the desired upper limit of the voltage range, a voltage input greater than 2.6VDC and less than Vdd can be accommodated.

 

Hardware Interface: A PSoC input pin is connected to a high impedance analog input connection to the Analog to Digital Converter (ADC), through a programmable gain block.

 

Software Interface: The input voltage level is presented as a 16-bit signed integer, stored most significant byte first, in whole number format to 1mV resolution (example: 2.123VDC stored as 2123).

 

Go Back to Top of the Page

 

Driver Properties

User-Configurable properties.

·  Signal Filtering: First order IIR digital filter: Disable, Enable. Default setting is Disable.

 

·  Upper Limit: Upper voltage limit at the input pin (in millivolts): 2600, 2773, 2971, 3200, 3467, 3782, 4160, 4622, 5000. Default setting is 2600 mV.

 

Non-Configurable properties.

· Reference: Normal (0-2600mV internal reference)

 

Go Back to Top of the Page

 

Driver Specifications

·  Input Range: Limited by property "Upper Voltage Limit"

·  Resolution: 1mVDC

 

Go Back to Top of the Page

 

Interface Schematic

 

Go Back to Top of the Page